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In Chil Lim

소속기관
대한전자공학회
소속부서
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연구경력
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주요 연구분야

  • 공학 > 전자/정보통신공학

저자의 연구 키워드

저자가 작성한 논문들의 주요 키워드입니다.

저자의 연구 키워드
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저자의 논문 현황

연도별 상세보기를 클릭하시면 연도별 이용수·피인용수 상세 현황을 확인하실 수 있습니다.
피인용수는 저자의 논문이 DBpia 내 인용된 횟수이며, 실제 인용된 횟수보다 적을 수 있습니다.
  • 논문수24
  • 발행기간1986 ~ 1996
  • 이용수135
  • 피인용수0

논문제목를 인용한 논문목록입니다.

  • 피인용 논문 제목
    • 피인용 논문 저자
게시판 목록
논문명 저널명 발행연도 이용수 피인용수
Detection of Stuck-Open Faults in BiCMOS Circuits using Equivalent Gate-level Models ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications 1996 17 0
Weighted Random Robust Path Delay Fault Testing of Digital Circuits ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications 1996 13 0
Speaker-Adaptive Word Recognition Using 1st Order Transformation Network JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications 1995 10 0
Call Admission Control in BISDN Using Neural Networks JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications 1994 3 0
A Neural Network Controller for ATM Switches ICEIC : International Conference on Electronics, Informations and Communications 1993 0 0
A Shortest path Allocation Algorithm for the Load Balancing in Hypercubes ICEIC : International Conference on Electronics, Informations and Communications 1993 0 0
From the General Chairman ICEIC : International Conference on Electronics, Informations and Communications 1993 0 0
A Cache Lock Mechanism for Shared Memory Multiprocessor Systems JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications 1993 12 0
A Neural Network Controller for ATM Switches International Conference on Electronics, Informations and Communications 1993 6 0
An Efficient Delay Test Method Using Boundary-Scan Architecture ICVC : International Conference on VLSI and CAD 1993 3 0
A PARALLEL FFT ALGORITHM FOR THE REAL-TIME PROCESSING OF HDTV IMAGE DATA JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications 1992 18 0
AN APPROACH TO AUTOMATIC TEST PATTERN GENERATION USING NEURAL NETWORKS JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications 1992 8 0
A BUILT-IN SELF TEST TECHNIQUE FOR STUCK-OPEN FAULTS OF CMOS CIRCUITS ICEIC : International Conference on Electronics, Informations and Communications 1991 0 0
A Test Generation Algorithm for Fault Detection in Domino CMOS Circuits JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications 1991 13 0
A Built-In Self Test Technique for Stuck-Open Faults of CMOS Circuits International Conference on Electronics, Informations and Communications 1991 2 0
A Register Allocation technique for RISC Optimizing Compilers JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications 1990 6 0
A New Algorithm for Optimal State Assignment in Multi-level Logic Design JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications 1989 4 0
AN APPROACH TO GATE MATRIX LAYOUT ICVC : International Conference on VLSI and CAD 1989 4 0
AN EFFICIENT ALGORITHM FOR MULTI-LEVEL LOGIC OPTIMIZATION OF FINITE STATE MACHINES ICVC : International Conference on VLSI and CAD 1989 3 0
An Algorithm for Software Interlock in Pipelined Architectures JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications 1988 11 0
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