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논문 기본 정보

자료유형
학술저널
저자정보
Ali Ajami (Azarbaijan Shahid Madani University) Ataollah Mokhberdoran (Azarbaijan Shahid Madani University) Mohammad Reza Jannati Oskuee (Azarbaijan Shahid Madani University)
저널정보
대한전기학회 Journal of Electrical Engineering & Technology Journal of Electrical Engineering & Technology Vol.8 No.6
발행연도
2013.11
수록면
1,328 - 1,336 (9page)

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초록· 키워드

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Nowadays multilevel inverters are developing generally due to reduced voltage stress on power switches and low total harmonic distortion (THD) in output voltage. However, for increasing the output voltage levels the number of circuit devices are increased and it results in increasing the cost of converter. In this paper, a novel multilevel inverter is proposed. The suggested topology uses less number of power switches and related gate drive circuits to generate the same level in output voltage with comparison to traditional cascaded multilevel inverter. With the proposed topology all levels in output voltage can be realized. As an illustration, a symmetric 13-level and asymmetric 29-level proposed inverters have been simulated and implemented. The total peak inverse (PIV) and power losses of presented inverter are calculated and compared with conventional cascaded multilevel inverter. The presented analyses show that the power losses in the suggested multilevel inverter are less than the traditional inverters. Presented simulation and experimental results demonstrate the feasibility and applicability of the proposed inverter to obtain the maximum number of levels with less number of switches.

목차

Abstract
1. Introduction
2. Proposed Topology
3. Conventional Cascade Multilevel Inverters Configuration
4. Comparison Study
5. Calculation of Power Losses
6. Simulation Results
7. Experimental Results
8. Conclusion
References

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