상세검색
검색어 입력 검색어는 최대 5개까지 추가하실 수 있습니다.
비밀번호 변경 안내
비밀번호를 변경하신 지 90일 이상 지났습니다.
개인정보 보호를 위해 비밀번호를 변경해 주세요.
비밀번호 변경 안내
비밀번호를 변경하신 지 90일 이상 지났습니다.
개인정보 보호를 위해 비밀번호를 변경해 주세요.
- 학술저널
- Top 10%
- 대한산업공학회
- 대한산업공학회지
- 대한산업공학회지 제44권 제4호
- 2018.08
- 249 - 258 (10 pages)
- KCI우수등재
DOI : 10.7232/JKIIE.2018.44.4.249
초록
The Electrical die sorting (EDS) test is performed to discriminate defective wafers for the purpose of improving the yield of the wafers during the semiconductor manufacturing process, and wafer maps are generated as a result. Semiconductor manufacturing process and equipment engineers use the patterns of the wafer map based on their knowledge to judge the defective wafer and estimate the cause. We use convolutional neural network which demonstrate good performance in the image classification. The convolutional neural network is used as a classification model of which the image of wafer map itself as input and whether the image is good or bad as output. While previous studies have used hand-crafted features for wafer map-based fault detection, the methodology used in this study is that the convolutional neural network learns the features useful for classification, it has the advantage of integrating knowledge. We show that the proposed classifier has better prediction accuracy than the conventional machine learning based techniques such as multilayer perceptron and random forest empirically by experiments on the data collected in the actual semiconductor manufacturing process.
목차
1. 서론
2. 선행 연구
3. 실험 설계
4. 실험 결과
5. 결론
참고문헌
참고문헌(50)
-
1.
-
2.
-
3.
-
4.
-
5.
함께 이용한 논문(5)
-
1.
-
2.
-
3.
-
4.
-
5.
추천 논문(5)
-
1.
-
2.
-
3.
-
4.
-
5.
리뷰(0)
도움이 되었어요.0
도움이 안되었어요.0
도움이 되었어요.0
도움이 안되었어요.0
