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    초록·키워드

    Real-time implementation of variable rate QCELP speech coder algorithm(IS-96) is presented. The QCELP algorithm has been chosen as the speech coder of digital cellular system in North America and Korea. A real-time implementation of the QCELP algorithm is achieved using a 16 bit fixed point TMS320C50 DSP Chip. The fixed point simulation of QCELP coder is performed in order to find the trade-off between the speech quality and the complexity. Furthermore, the configuration of vocoder system including input/output functions with a single DSP chip is described. The QCELP codec implementation is evaluated in a DSP evaluation board and our real CDMA digital cellular system. All of digital cellular systems have their own digital speech compression techniques. The TDMA system uses 8 kbps Vector Sum Excited Linear Prediction (VSELP) coder[1][2], the GSM system uses 13 kbps Regular Pulse Excited-Long Term Prediction (RPE-LTP) coder[3] and the CDMA system uses Variable Rate Qualcomm Code Excited Linear Prediction (QCELP) coder[4]. It has been chosen as an interim standard vocoder (IS-96) for CDMA digital cellular system in North American and Korea. The main advantage in use of variable rate QCELP coder can reduce the average date rate required to transmit conversation speech by a factor of two or more, while the speech quality of variable rate coder maintains same as that of full rate coder. The use of variable rate coder leads to increase in the capacity of a CDMA system.

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      UCI(KEPA) : I410-ECN-0101-2009-569-013254230