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논문 기본 정보

자료유형
학술대회자료
저자정보
(연세대학교) (연세대학교)
저널정보
Korean Institute of Information Scientists and Engineers 한국정보과학회 학술발표논문집 한국정보과학회 2011가을 학술발표논문집 제38권 제2호(A)
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27 - 30 (4page)

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초록· 키워드

As technology scaling, soft errors induced by external radiation are becoming a big concern in micro-architecture. In particular, a soft error is harmful to microprocessor since it propagates erroneous states to other components of processors. Since data in register files are read and written by CPU frequently, we can protect register files against errors (including soft errors) by exploiting Triple Modular Redundancy (TMR) or Error Correction Code (ECC). However, these technologies incur high overheads in terms of area cost, access time, and power consumption. In this work, we exploit the feature of asymmetric error rates in soft errors at SRAM (different soft error rates between 0 and 1 in bit values) and propose a simple micro-architecture for register files by adding inverters to increase the number of more stable bit values in registers. Our experimental results show that our proposal can reduce soft error rates by 15% on average over a suite of benchmarks with minimal overheads in terms of performance, power and area.
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목차

  1. Abstract
  2. 1. Introduction
  3. 2. Related Work
  4. 3. Our Approach
  5. 4. Experiments
  6. 5. Conclusion
  7. Reference

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UCI(KEPA) : I410-ECN-0101-2013-569-001148906