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    초록·키워드

    This paper presents a semi-custom ASIC design for the MPEG-2 layer 2 audio encoder To process 5.1 channel data in real time, the encoder has been designed into three modules : 1024 point FFT, analysis filter, and processor core which performs operations other than by two previous modules. Each module has been designed independent of one another to achieve efficiency for our ASIC design and verification Our design has been verified by comparing computer simulation with post-synthesis simulation. The encoder system has been designed in VHDL(VHSIC Hardware Description Language), and developed as a singl ... 전체 초록 보기

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      UCI(KEPA) : I410-ECN-0101-2009-569-013239375