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논문 기본 정보

저자정보
(Ritsumeikan University) (Ritsumeikan University) (Ritsumeikan University) (Ritsumeikan University) (Ritsumeikan University)
저널정보
대한전자공학회 ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications ITC-CSCC : 2009
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    초록·키워드

    This paper presents a new power macro-modeling technique for resister transfer level (RTL). RTL power macro-modeling technique is well known as promising technique for fast power estimation. Our method is based on a table look-up constructed by statistical information extracted from the primary inputs to the circuit. In this paper, we propose a novel power estimation method with a new parameter SD. This parameter characterizes switching activity of an internal circuit. The switching activities of each gate are strongly related with the power consumption. Experimental results show that the proposed method improves RMS error about 10% in average with the ISCAS-85 combinational circuits. The average RMS error of our model was 4.5%.

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      UCI(KEPA) : I410-ECN-0101-2012-569-004022390