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논문 기본 정보

저자정보
(Sungkyunkwan University) (Sungkyunkwan University)
저널정보
대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.25 No.1
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    초록·키워드

    An automatic methodology is proposed to optimize analog device placement using reinforcement learning (RL). Device characteristics are influenced by local layout effects and the process node used; hence, physical layout information from post-layout simulation acts as the input for an artificial neural network (ANN). Trained ANNs can be implemented as surrogate models for length of diffusion and deep trench isolation, which are integrated into the reward functions of the learning agent. The Q-learning method is employed for RL. The proposed method emulates design expert expertise by sequentially applying multiple Q-learning with selected reward functions. This approach effectively completes local layout effect-aware automated placement in the early setup stage of advanced process nodes, even with limited design knowledge. Finally, two fundamental analog circuits, the folded cascode operational transconductance amplifier and comparator, are employed to demonstrate the method’s ability to achieve zero threshold voltage variation under local layout effects using dummy transistors and guard rings while maintaining area efficiency.

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      UCI(KEPA) : I410-151-25-02-092296251