인문학
사회과학
자연과학
공학
의약학
농수해양학
예술체육학
복합학
DBpia AI
AI 에이전트
AI 아이디어
AI 리더
AI 뷰어
Citeasy
크롬 서지관리 다운로드
지원사업
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커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 저자정보
피인용 0
초록·키워드
In this study, we propose a novel Inter-Deck-Body (IDB) architecture to enhance the erase operation performance of 3D NAND flash memory. The IDB architecture is positioned between adjacent decks and consists of a P<sup>+</sup> IDB region, an N<sup>+</sup> channel connector, and four IDB dummy cells. During the erase operation, holes are directly supplied from the P<sup>+</sup> IDB region to the channel, thereby boosting the channel potential. Unlike conventional 3D NAND flash memories that rely on gate-induced drain leakage (GIDL) for erase operation, the proposed architec- ture achieves erase without inducing GIDL current. Technology computer-aided design (TCAD) simulations were conducted to verify the functionality of the proposed IDB structure. Through these simulations, optimal structural parameters and biasing conditions for each operation mode were identified. In particular, it was demonstrated that the IDB-based erase scheme exhibits superior erase efficiency compared to conventional GIDL-based erase methods. Moreover, the proposed architecture ensures read operation without degradation in on-current, maintaining high read performance. These results indicate that the proposed IDB architecture is a highly scalable and promising solution for multi-deck 3D NAND flash memory, offering both improved erase performance and read integrity.
본문·목차
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