메뉴 건너뛰기

추천
검색
질문

논문 기본 정보

자료유형
학술저널
저자정보
(고려대학교) (고려대학교) (고려대학교) (고려대학교) (고려대학교)
저널정보
대한산업공학회 대한산업공학회지 대한산업공학회지 제44권 제4호
발행연도
수록면
249 - 258 (10page)
DOI
10.7232/JKIIE.2018.44.4.249

이용수

표지
📌
연구주제
📖
연구배경
🔬
연구방법
이 논문의 연구방법이 궁금하신가요?
🏆
연구결과
이 논문의 연구결과가 궁금하신가요?
AI에게 요청하기
추천
검색
질문

초록· 키워드

The Electrical die sorting (EDS) test is performed to discriminate defective wafers for the purpose of improving the yield of the wafers during the semiconductor manufacturing process, and wafer maps are generated as a result. Semiconductor manufacturing process and equipment engineers use the patterns of the wafer map based on their knowledge to judge the defective wafer and estimate the cause. We use convolutional neural network which demonstrate good performance in the image classification. The convolutional neural network is used as a classification model of which the image of wafer map itself as input and whether the image is good or bad as output. While previous studies have used hand-crafted features for wafer map-based fault detection, the methodology used in this study is that the convolutional neural network learns the features useful for classification, it has the advantage of integrating knowledge. We show that the proposed classifier has better prediction accuracy than the conventional machine learning based techniques such as multilayer perceptron and random forest empirically by experiments on the data collected in the actual semiconductor manufacturing process.
상세정보 수정요청해당 페이지 내 제목·저자·목차·페이지
정보가 잘못된 경우 알려주세요!

목차

  1. 1. 서론
  2. 2. 선행 연구
  3. 3. 실험 설계
  4. 4. 실험 결과
  5. 5. 결론
  6. 참고문헌

참고문헌

참고문헌 신청

최근 본 자료

전체보기