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논문 기본 정보

자료유형
학술저널
저자정보
Yiqiang Ding (Southern Illinois University) Jun Yan (Southern Illinois University) Wei Zhang (Department of Electrical and Computer Engineering)
저널정보
Korean Institute of Information Scientists and Engineers Journal of Computing Science and Engineering Journal of Computing Science and Engineering Vol.3 No.1
발행연도
2009.3
수록면
59 - 71 (13page)

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초록· 키워드

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While the average-case performance is important for general-purpose applications, worst-case performance is crucial for real-time systems to ensure schedulability and reliability. Recent work has shown that simple prefetching techniques such as the Next-N-Line prefetching can benefit both average-case and worst-case performance; however, the improvement on the worstcase execution time (WCET) is rather limited and inefficient. This paper presents two instruction prefetching approaches that are specially designed to enhance the worst-case performance, including the loop-based prefetching and WCET-oriented prefetching. Our experiments indicate that both instruction prefetching techniques can achieve better worst-case execution cycles than the Next-N-Line prefetching while having various impacts on the average-case performance.

목차

1. INTRODUCTION
2. LOOP-BASED INSTRUCTION PREFETCHING
3. WCET-ORIENTED INSTRUCTION PREFETCHING
4. EVALUATION METHODOLOGY
5. EXPERIMENTAL RESULTS
6. RELATED WORK
7. CONCLUDING REMARKS
ACKNOWLEDGMENTS
REFERENCES

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