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학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2011.5
- 수록면
- 1,087 - 1,094 (8page)
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초록· 키워드
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This paper investigates the switching behaviour of normally-off SiC JFETs in an inverter for a motor drive. The parasitic ringing caused by different parasitic effects is analysed. Two different methods, the use of an RC snubber and the use of a ferrite bead, are proposed for dampening the parasitic oscillations. It is found that applying a ferrite bead not only dampens the parasitic oscillations but also results in significantly lower switching losses. Furthermore, it is shown that the capacitive coupling between SiC devices and heat sinks significantly deteriorates the JFETs’ switching performance. The effect of two substrates, an IMS and a PCB, on the capacitive coupling is investigated. A method in which the use of two separate heat sinks minimises the capacitive coupling thus exploiting the full potential of fast SiC JFETs is proposed.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. GATE DRIVER FOR NORMALLY-OFF SIC JFET
Ⅲ. PARASITIC OSCILLATIONS - ANALYSIS AND DAMPING METHODS
Ⅳ. PARASITIC CAPACITIVE COUPLING BETWEEN SIC JFETS AND HEAT SINK
Ⅴ. CONCLUSION
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2013-560-000300190