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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.12 No.1
- 발행연도
- 2012.3
- 수록면
- 107 - 116 (10page)
이용수
초록· 키워드
오류제보하기
In this paper, the trade-off related to bandwidth of high-speed common-mode logic frequency divider is analyzed in detail. A method to optimize the operating frequency, band-width as well as power consumption is proposed. This method is based on bipolar device characteristics, whereby a negative resistance model can be used to estimate the optimal normalized upper frequency and lower frequency of frequency dividers under different conditions, which is conventionally ignored in literatures. This method provides a simple but efficient procedure in designing high performance frequency dividers for different applications. To verify the proposed method, a static divide-by-2 at millimeter wave ranges is implemented in 180 ㎚ SiGe technology. Measurement results of the divider demonstrate significant improvement in the figure of merit as compared with literatures.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. MODEL DERIVATION AND THEORETICAL ANALYSIS
Ⅲ. BAND-WIDTH AND POWER CONSUMPTION OPTIMIZATION
Ⅳ. A OPTIMIZED 40 GHZ STATIC FREQUENCY DIVIDER
Ⅴ. CONCLUSIONS
ACKNOWLEDGMENTS
REFERENCES
참고문헌 (19)
참고문헌 신청
1. [학술대회논문] - Tomkins. A / 2008 / A zero-IF 60 GHz transceiver in 65nm CMOS with ≫ 3.5 Gb/s links / Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE : 471 ~
2. [학술대회논문] - Chi-Hsueh. Wang / 2007 / A 60 GHz Low-Power Six- Port Transceiver for Gigabit Software-Defined Transceiver Applications / IEEE Internationa Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers : 192 ~ 596
3. [학술대회논문] - Knapp. H / 2002 / 25 GHz static frequency divider and 25 Gb/smultiplexer in 0.12 μ CMOS / 2002 IEEEInternational Solid-State Circuits Conference, 2002.Digest of Technical Papers. ISSCC : 240 ~
4. [학술지(정기간행물)] - Lee. J / 2004 / A 40- GHz Frequency Divider in 0.18 um CMOS technology / IEEE JOURNAL OF SOLID-STATE CIRCUITS 39 (4) : 594 ~ 601
5. [학술대회논문] - Yuan. Mo / 2008 / A 40 GHz Power Efficient Static CML FrequencyDivider in 0.13-μm CMOS Technology for HighSpeed Millimeter-Wave Wireless Systems / 4thIEEE International Conference on Circuits andSystems for Communications, 2008. ICCSC 2008 : 812 ~
2. [학술대회논문] - Chi-Hsueh. Wang / 2007 / A 60 GHz Low-Power Six- Port Transceiver for Gigabit Software-Defined Transceiver Applications / IEEE Internationa Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers : 192 ~ 596
3. [학술대회논문] - Knapp. H / 2002 / 25 GHz static frequency divider and 25 Gb/smultiplexer in 0.12 μ CMOS / 2002 IEEEInternational Solid-State Circuits Conference, 2002.Digest of Technical Papers. ISSCC : 240 ~
4. [학술지(정기간행물)] - Lee. J / 2004 / A 40- GHz Frequency Divider in 0.18 um CMOS technology / IEEE JOURNAL OF SOLID-STATE CIRCUITS 39 (4) : 594 ~ 601
5. [학술대회논문] - Yuan. Mo / 2008 / A 40 GHz Power Efficient Static CML FrequencyDivider in 0.13-μm CMOS Technology for HighSpeed Millimeter-Wave Wireless Systems / 4thIEEE International Conference on Circuits andSystems for Communications, 2008. ICCSC 2008 : 812 ~
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