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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.12 No.4
- 발행연도
- 2012.12
- 수록면
- 458 - 466 (9page)
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초록· 키워드
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A Dual metal gate stack cylindrical/surrounded gate MOSFET (DMGSA CGT/SGT MOSFET) has been proposed and an analytical model has been developed to examine the impact of this structure in suppressing short channel effects and in enhancing the device performance. It is demonstrated that incorporation of gate stack along with dual metal gate architecture results in improvement in short channel immunity. It is also examined that for DMGSA CGT/SGT the minimum surface potential in the channel reduces, resulting increase in electron velocity and thereby improving the carrier transport efficiency. Furthermore, the device has been analyzed at different bias point for both single material gate stack architecture (SMGSA) and dual material gate stack architecture (DMGSA) and found that DMGSA has superior characteristics as compared to SMGSA devices. The analytical results obtained from the proposed model agree well with the simulated results obtained from 3D ATLAS Device simulator.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. ANALYTICAL MODEL
Ⅲ. RESULTS AND DISSCUSSION
Ⅳ. CONCLUSIONS
ACKNOWLEDGMENT
REFERENCES
참고문헌 (24)
참고문헌 신청
J Tanaka / 1993 / Simulation of sub-0.1-μm MOSFET’s with completely suppressed short-channel effect / IEEE Electron Device Letters 14(8):396~399
P H Bricout / 1996 / Short-channel effect immunity and current capability of sub-0.1-micron MOSFET’s using a recessed channel / IEEE Trans. Electron Devices 43(8):1251~1255
K. K Young / 1989 / Short channel effect in fully depleted SOI MOSFETs / IEEE Trans. Electron Devices 36(2):399~402
K Roy / 2006 / Double-gate SOI devices for low-power and high-performance applications / VLSI Design conference 2006
Jong-Tae Park / 2011 / Pi-Gate SOI MOSFE / IEEE Electron Device Letters 22(8):405~406
P H Bricout / 1996 / Short-channel effect immunity and current capability of sub-0.1-micron MOSFET’s using a recessed channel / IEEE Trans. Electron Devices 43(8):1251~1255
K. K Young / 1989 / Short channel effect in fully depleted SOI MOSFETs / IEEE Trans. Electron Devices 36(2):399~402
K Roy / 2006 / Double-gate SOI devices for low-power and high-performance applications / VLSI Design conference 2006
Jong-Tae Park / 2011 / Pi-Gate SOI MOSFE / IEEE Electron Device Letters 22(8):405~406
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