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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전기학회 Journal of Electrical Engineering & Technology Journal of Electrical Engineering & Technology Vol.9 No.2
- 발행연도
- 2014.3
- 수록면
- 686 - 694 (9page)
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초록· 키워드
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A power semiconductor device, usually used as a switch or rectifier, is very significant in the modern power industry. The power semiconductor, in terms of its physical properties, requires a high breakdown voltage to turn off, a low on-state resistance to reduce static loss, and a fast switching speed to reduce dynamic loss. Among those parameters, the breakdown voltage and on-state resistance rely on the doping concentration of the drift region in the power semiconductor, this effect can be more important for a higher voltage device. Although the low doping concentration in the drift region increases the breakdown voltage, the on-state resistance that is increased along with it makes the static loss characteristic deteriorate. On the other hand, although the high doping concentration in the drift region reduces on-state resistance, the breakdown voltage is decreased, which limits the scope of its applications. This addresses the fact that breakdown voltage and on-state resistance are in a trade-off relationship with a parameter of the doping concentration in the drift region. Such a trade-off relationship is a hindrance to the development of power semiconductor devices that have idealistic characteristics. In this study, a novel structure is proposed for the Insulated Gate Bipolar Transistor(IGBT) device that uses conductivity modulation, which makes it possible to increase the breakdown voltage without changing the on-state resistance through use of a P-floating layer. More specifically in the proposed IGBT structure, a P-floating layer was inserted into the drift region, which results in an alleviation of the trade-off relationship between the on-state resistance and the breakdown voltage. The increase of breakdown voltage in the proposed IGBT structure has been analyzed both theoretically and through simulations, and it is verified through measurement of actual samples.
목차
Abstract
1. Introduction
2. Suggestion of the Novel Structure
3. Theoretical Analysis
4. Simulation
5. Experiments
6. Conclusion
References
참고문헌 (16)
참고문헌 신청
1. [단행본] - B. J. Baliga / 1996 / Power semiconductor devices / PWS Publishing Company
2. [학술대회논문] - Maasayasu ISHIKO / 2003 / A Novel PT-IGBT with a p-/n+ Buffer Layer / ISPSD : 341 ~ 344
3. [학술지(정기간행물)] - Moriaki Mizuno / 1992 / A 3-mW 1. 0-GHz silicon-ECL dual-modulus prescaler IC / IEEE J. solid-state circuit 27 (12) : 1794 ~ 1798
4. [학술지(정기간행물)] - Jong-Seok Lee / 2008 / Shielding region effects on a trench gate IGBT / Microelectronics Journal 39 : 57 ~
5. [학술대회논문] - Yoshiyuki Hattori / 2004 / / Proceedings of International symposium on Power Semiconductor Devices & ICs : 189 ~ 192
2. [학술대회논문] - Maasayasu ISHIKO / 2003 / A Novel PT-IGBT with a p-/n+ Buffer Layer / ISPSD : 341 ~ 344
3. [학술지(정기간행물)] - Moriaki Mizuno / 1992 / A 3-mW 1. 0-GHz silicon-ECL dual-modulus prescaler IC / IEEE J. solid-state circuit 27 (12) : 1794 ~ 1798
4. [학술지(정기간행물)] - Jong-Seok Lee / 2008 / Shielding region effects on a trench gate IGBT / Microelectronics Journal 39 : 57 ~
5. [학술대회논문] - Yoshiyuki Hattori / 2004 / / Proceedings of International symposium on Power Semiconductor Devices & ICs : 189 ~ 192
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