Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

Tingcun Wei; Yulin Wang; Feng Li; Nan Chen; Jia Wang

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자료유형: 학술저널

저자정보: Tingcun Wei (Northwestern Polytechnical University) Yulin Wang (Northwestern Polytechnical University) Feng Li (Northwestern Polytechnical University) Nan Chen (Northwestern Polytechnical University) Jia Wang (Northwestern Polytechnical University)

저널정보: 전력전자학회 JOURNAL OF POWER ELECTRONICS JOURNAL OF POWER ELECTRONICS Vol.16 No.1

발행연도: 2016.1

수록면: 227 - 237 (11page)

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A novel digital current control strategy for digitally controlled DC-DC switching converters, referred to as Adjacent Cycle Sampling (ACS), is proposed in this paper. For the ACS current control strategy, the available time interval from sampling the current to updating the duty ratio, is approximately one switching cycle. In addition, it is independent of the duty ratio. As a result, the contradiction between the processing speed of the hardware and the transient response speed can be effectively relaxed by using the ACS current control strategy. For digitally controlled buck DC-DC switching converters with trailing-edge modulation, digital current control algorithms with the ACS control strategy are derived for three different control objectives. These objectives are the valley, average, and peak inductor currents. In addition, the sub-harmonic oscillations of the above current control algorithms are analyzed and eliminated by using the digital slope compensation (DSC) method. Experimental results based on a FPGA are given, which verify the theoretical analysis results very well. It can be concluded that the ACS control has a faster transient response speed than the time delay control, and that its requirements for hardware processing speed can be reduced when compared with the deadbeat control. Therefore, it promises to be one of the key technologies for high-frequency DC-DC switching converters.

#Adjacent Cycle Sampling (ACS) #Digitally controlled DC-DC switching converter #Digital current control algorithm #Digital Slope Compensation (DSC) #Sub-harmonic oscillation #Transient response speed

참고문헌 (20)

참고문헌 신청

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[학술대회논문] - B. Sahu / 2005 / A high-efficiency, dual-mode, dynamic, buck-boost power supply IC for portable applications / 18th Int. Conf. VLSI Design : 858 ~ 861

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[학술대회논문] - A. Prodic / 2001 / Design and implementation of a digital PWM controller for a high-frequency switching DC-DC power converter / 27th Annual Conf. of the Industrial Electronics Society 2 : 893 ~ 898

[학술지(정기간행물)] - L. Pengfei / 2011 / A 90–240 MHz Hysteretic Controlled DC-DC Buck Converter With Digital Phase Locked Loop Synchronization / IEEE J. Solid-State Circuits 46 (9) : 2108 ~ 2119

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