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논문 기본 정보

자료유형
학술저널
저자정보
M. Dhamodaran (M. Kumarasamy College of Engineering) R. Praveen Kumar (M. Kumarasamy College of Engineering) S. Jegadeesan (M. Kumarasamy College of Engineering)
저널정보
한국자기학회 Journal of Magnetics Journal of Magnetics Vol.23 No.1
발행연도
2018.3
수록면
50 - 54 (5page)
DOI
10.4283/JMAG.2018.23.1.050

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초록· 키워드

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This paper presents a new model for designing on-chip spiral inductor and on-chip spiral transistors. For this, the coupling between on-chip inductors and transistors has been implemented. The electromagnetic coupling between the inductors and the transistors and the mutual inductance are modeled by presenting the magnetic vector potential to study the coupling effect. It changes the surface integral of the magnetic field into the loop integral of the magnetic vector potential to calculate the coupling. In this method, the partial mutual inductance idea to compute the mutual inductance between two conductor sections instead of conductor loops can be developed. The inductance classification is applied to an on-chip environment to characterize interconnects and integrated inductors. The investigative model is reconsidered to incorporate the semiconductor substrate losses and the skin effect. The numerical solutions of the investigative model are also presented. To simulate the proposed model ADS Momentum software is used.

목차

1. Introduction
2. The Scatter Parameters
3. Coupling between On-Chip Spiral Inductors
4. Coupling between On-Chip Inductors and Transistors
5. Results and Discussion
6. Conclusion
References

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UCI(KEPA) : I410-ECN-0101-2018-428-001901034