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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 발행연도
- 2011.1
- 수록면
- 100 - 107 (8page)
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초록· 키워드
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As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements(PEs) and operates on a 3-stage pipelining. Experimental results for the JPEG encoding algorithm indicate that the proposed parallel processor outperforms conventional parallel processors in terms of performance and energy efficiency. In addition, the proposed parallel processor architecture was developed and verified with verilog HDL and a FPGA prototype system.
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참고문헌 (17)
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A. A. Abbo / 2008 / Xetal-II: A 107 GOPS, 600 mW massively parallel processor for video scene analysis / IEEE J. Solid-State Circuits 43 (1) : 192 ~ 201
Antonio Gentile / 2004 / Portable video supercomputing / IEEE Trans. Computers 53 (8) : 960 ~ 973
/ / TMS320C64x families
/ / Xilinx Userguide
A. A. Abbo / 2008 / Xetal-II: A 107 GOPS, 600 mW massively parallel processor for video scene analysis / IEEE J. Solid-State Circuits 43 (1) : 192 ~ 201
Antonio Gentile / 2004 / Portable video supercomputing / IEEE Trans. Computers 53 (8) : 960 ~ 973
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