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논문 기본 정보

자료유형
학술저널
저자정보
Jong-Yeol Lee (Jeonbuk National University)
저널정보
대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.20 No.2
발행연도
2020.4
수록면
204 - 213 (10page)
DOI
10.5573/JSTS.2020.20.2.204

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초록· 키워드

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This paper proposes a new area-optimized signal conditioner (SC) structure, which obtains the angular or the linear position information from a rotary variable differential transformer (RVDT) or a linear variable differential transformer (LVDT) sensor output signal, respectively, based on coordinate rotation digital computer (CORDIC) algorithm. In the proposed signal conditioner a Costas loop is modified by replacing both one low-pass filter, two multipliers and a threshold block that are used to determine the sign of the signal conditioner output and a narrowband loop filter and a multiplier that are used to calculate a loop error signal with a CORDIC block, which results in a smaller area. The proposed signal conditioner shows a better linearity performance since the CORDIC block directly calculate the loop error that is equal to the phase error between the sensor output and the local carrier signals unlike the conventional Costas loop where the loop error is approximated by evaluating a sine function whose the argument is the phase error. The proposed signal conditioner that is implemented by using a standard CMOS technology achieves the reduction of 44.1% in the total area and the linearity performance comparable to that of a state-of-the-art commercial signal conditioner of which the maximum linearity error is 0.01% of full scale output.

목차

Abstract
I. INTRODUCTION
II. SIGNAL CONDITIONER BASED-ON COSTAS LOOP
III. OPERATION OF CORDIC
IV. PROPOSED SIGNAL CONDITIONER
V. EXPERIMENTAL RESULTS
VI. CONCLUSION
REFERENCES

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