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학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 한국과학기술원 정보전자연구소 IDEC Journal of Integrated Circuits and Systems IDEC Journal of Integrated Circuits and Systems Vol.9 No.1
- 발행연도
- 2023.1
- 수록면
- 12 - 17 (6page)
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초록· 키워드
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A floating inverter amplifier (FIA) is an alternative amplifier for switched-capacitor circuits. FIA-based switched-capacitor circuits have both negative feedback and dynamic operation advantages. However, the self-cutoff operation creates time-varying operating points while acting as an amplifier. Therefore, a small-signal analysis cannot anticipate the system's response. This paper presents a circuit-design-oriented intuition to tame the step response of such circuits. Also, the simulation method using RF simulators is explained to verify the gain and noise performance. Finally, a Miller-compensated 2-stage FIA is designed based on described design procedure, then applied to a fully dynamic zoom ADC design. The prototype ADC achieves 101.6 dB signal-to-noise and distortion ratio (SNDR) with an SNDR-based Schreier figure of merit (FoM) of 174.2 dB at 2.56-MHz fs having linearly scalable bandwidth and power consumption as fs varies, as well as easy power duty-cycling.
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