메뉴 건너뛰기
소속 기관 / 학교 인증
인증하면 논문, 학술자료 등을  무료로 열람할 수 있어요.
한국대학교, 누리자동차, 시립도서관 등 나의 기관을 확인해보세요
(국내 대학 90% 이상 구독 중)
고객센터 ENG
주제분류

논문 기본 정보

저자정보
저널정보
대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.25 No.5
오류 신고하기

피인용 0

검색

    초록·키워드

    The rapid advancement of high bandwidth memory (HBM) technology introduces significant challenges in metrology due to its complex 3D stacked die architecture. Conventional measurement and inspection tools, optimized for planar DRAM wafers, fail to accurately assess critical die-to-die alignment parameters such as die shift and tilt, particularly post-bonding. This paper presents a novel metrology methodology leveraging infrared (IR) imaging combined with advanced image processing algorithms to overcome these limitations. A dual-scan system captures both base wafer fiducials and top die patterns, enabling precise alignment measurement within stacked HBM assemblies. Edge enhancement using Sobel filtering and normalized cross-correlation (NCC) techniques facilitate robust pattern recognition and sub-pixel alignment, addressing challenges posed by low contrast and IR resolution constraints. Experimental validation on production-grade HBM wafers demonstrates superior recognition rates and measurement repeatability, establishing the proposed approach as a reliable and efficient solution for next-generation semiconductor metrology. The integration of IR optics and sophisticated algorithmic processing significantly improves inspection coverage, contributing to enhanced yield and manufacturing robustness in advanced 3D memory technologies.

    최근 본 자료 전체보기

      UCI(KEPA) : I410-151-26-02-094304500