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논문 기본 정보

자료유형
학술저널
저자정보
Chang Young Lim (Gangneung-Wonju National University) Yeon Seok Kim (Gangneung-Wonju National University) Min-Woo Kwon (Gangneung-Wonju National University)
저널정보
대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.24 No.1
발행연도
2024.2
수록면
18 - 24 (7page)
DOI
10.5573/JSTS.2024.24.1.18

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초록· 키워드

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Dynamic Random Access Memory is critical to computing for its speed and cost-effective capacity. As the demand for high-capacity memory grows, DRAM is being scaled down. However, reduced cell distances cause electrical disturbances between cells, resulting in 1-row hammer. This leads to abnormal operation and security risks. Therefore, 1-row Hammer is a major issue in modern DRAM technology. In this paper, we study the principle and impact of 1-row Hammer in DRAM, with a focus on D0 failures, a type of 1-row Hammer that causes stored data to transition from 0 to 1 due to repeated access. The mechanism involves the electron capture and diffusion of electrons affected by interfacial traps and device structures. To investigate the D0 failure, we reproduced the 1-row hammer using mixed mode to evaluate the effects on the interfacial trap and device structure changes. This research serves to improve understanding of row hammer and suggests a mitigation strategy using nitride layer. The proposed structure improves the D0 failure by about 70%, effectively improving the security vulnerability of DRAM.

목차

Abstract
I. INTRODUCTION
II. D0 FAILURE
III. RELATED RESEARCH
IV. SIMULATION CONDITION
V. SIMULATION RESULTS
VI. NITRIDE LAYER STRUCTURE
VII. CONCLUSION
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