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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.24 No.2
- 발행연도
- 2024.4
- 수록면
- 122 - 127 (6page)
- DOI
- 10.5573/JSTS.2024.24.2.122
이용수
초록· 키워드
오류제보하기
This paper investigates the resistance characteristics of thin film and contact structures in a 90-nm CMOS process under cryogenic temperature and high magnetic field environment for the first time. The temperature dependences of the test structures were measured at the ambient temperatures of 300 K, 150 K, 77 K and 4.2 K, respectively. To understand the magnetic field dependence of the test structures at the temperatures, measurements were also performed under the magnetic fields of 0 T, 2 T, 4 T and 6 T, respectively. The sheet resistances and the contact resistances are analyzed along with the magnetoresistances under the various conditions. All test structures showed a decreasing sheet resistance or contact resistance as the temperature decreases. The sheet resistance of a thin films with a lower value drops faster as the temperature decreases. The metal thin film and the metal-to-n+ contact showed the maximum resistance change of 89.5% and 35%, respectively, over the temperature range. Meanwhile, negligible magnetoresistances are observed except the metal thin film, which shows a higher magnetoresistance under a lower temperature and higher magnetic field. The maximum magnetoresistance of the metal thin film is measured to be 10.4% for the horizontal magnetic field of 6 T at 4.2 K.
목차
Abstract
I. INTRODUCTION
II. TEST STRUCTURES
III. MEASUREMENT RESULTS
V. CONCLUSIONS
REFERENCES
참고문헌 (17)
참고문헌 신청
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B. Patra, R. M. Incandela, J. P. G. van Dijk, H. A. R. Homulle, L. Song, M. Shahmohammadi, R. B. Staszewski, A. Vladimirescu, M. Babaie, F. Sebastiano and E. Charbon, “Cryo-CMOS Circuits and Systems for Quantum Computing Applications,” IEEE Journal of Solid-State Circuits, vol. 53, no. 1, pp. 1-13, Sep. 2018.
E. Charbon, F. Sebastiano, A. Vladimirescu, H. Homulle, S. Visser, L. Song and R. M. Incandela, “Cryo-CMOS for quantum computing,” IEEE Electron Devices Meeting (IEDM), pp. 343-346, Dec. 2016.
F. A. Zwanenburg, A. S. Dzurak, A. Morello, M. Y. Simmons, L. C. L. Hollenberg, G. Klimeck, S. Rogge, S. N. Coppersmith and M. A. Eriksson, “Silicon quantum electronics,” Rev. Mod. Phys., 85, 961, Jul. 2013.
M. Veldhorst, H. G. J. Eenink, C. H. Yang and A. S. Dzurak, “Silicon CMOS architecture for a spin-based quantum computer,” Nat. Commun., 8, 1766, 2017.
B. Patra, R. M. Incandela, J. P. G. van Dijk, H. A. R. Homulle, L. Song, M. Shahmohammadi, R. B. Staszewski, A. Vladimirescu, M. Babaie, F. Sebastiano and E. Charbon, “Cryo-CMOS Circuits and Systems for Quantum Computing Applications,” IEEE Journal of Solid-State Circuits, vol. 53, no. 1, pp. 1-13, Sep. 2018.
E. Charbon, F. Sebastiano, A. Vladimirescu, H. Homulle, S. Visser, L. Song and R. M. Incandela, “Cryo-CMOS for quantum computing,” IEEE Electron Devices Meeting (IEDM), pp. 343-346, Dec. 2016.
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