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논문 기본 정보

자료유형
학술저널
저자정보
정여진 (성균관대학교 전자전기컴퓨터공학과) 조재웅 (성균관대학교(자연과학캠퍼스)) Duy Phong Pham (Sungkyunkwan University) 이준신 (성균관대학교)
저널정보
한국전기전자재료학회 Transactions on Electrical and Electronic Materials Transactions on Electrical and Electronic Materials Vol.25 No.4
발행연도
2024.8
수록면
380 - 392 (13page)
DOI
https://doi.org/10.1007/s42341-024-00531-6

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Gate oxide in metal oxide semiconductor field effect transistor (MOSFET) or gate dielectric layer in thin film transistor (TFT) plays an important role in the inhibition of leakage current. Thus, high-quality of insulating properties (> 10 MV/cm) and high resistance of gate dielectric have been required. The dimension of gate oxide needs to be reduced for the amplified on-current and switching speed. However, the dimension of the oxide, developed so far, has reached its limit, and leakage current is inevitable. The structural, processing, and material methods were categorically discussed to improve insulating properties in TFT and MOSFET for leakage reduction. The parameters including threshold voltage, subthreshold swing (SS), and off current of developed devices were compared in this paper. Through advanced structure application such as GAA, capacitorless DRAM, and hybrid dielectrics, MOSFETs could be scaled down with minimum leakage current. This review paper has been divided into sections covering structural, material, and process developments that have been researched todate. After briefly explaining each of these aspects, the paper concludes by proposing the application of NO precursor as a novel reactant material, deuterium-passivation, and process parameter optimization to address the current reduction for further research.

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