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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2015.6
- 수록면
- 1,420 - 1,427 (8page)
이용수
초록· 키워드
오류제보하기
Phase-looked Loop (PLL) is a critical component for the control and grid synchronization of grid-connected power converters. This paper presents a benchmarking study on the small-signal dynamics of three commonly used PLLs for single-phase converters, including enhanced PLL, second-order generalized integrator based PLL, and the inverse-PLL. First, a unified small-signal model of those PLLs is established for comparing their dynamics. Then, a systematic design guideline for parameters tuning of the PLLs is formulated. To confirm the validity of theoretical analysis, nonlinear time-domain simulation results and experimental results are presented.
목차
Abstract
I. INTRODUCTION
II. SMALL SIGNAL MODELS OF THREE PLLS
III. DESIGN GUIDELINES
IV. SIMULATION AND EXPERIMENTAL RESULTS
V. CONCLUSION
REFERENCE
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