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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.16 No.1
- 발행연도
- 2016.2
- 수록면
- 91 - 105 (15page)
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초록· 키워드
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Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green’s functions (NEGF) solved self - consistently with Poisson’s equations. It is revealed that hetero -material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of Ф<SUB>M1</SUB>/Ф<SUB>M2</SUB> have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. CNTFET
Ⅲ. CNTFET - BASED CIRCUITS
Ⅳ. CONCLUSIONS
REFERENCES
참고문헌 (29)
참고문헌 신청
Lu, R. F., Lu, Y. P., & Lee, S. Y., “Terahertz response in single-walled carbon nanotube transistor: a real-time quantum dynamics simulation”, Nanotechnology, Vol. 20, no. 50, pp. 505401 ,2009.
Kienle, D., & Léonard, F.,“Terahertz response of carbon nanotube transistors”, Phys Rev Lett, Vol. 103, no. 2, pp. 026601, 2009.
Tans, S. J., Verschueren, A. R. M., & Dekker, C., “Room-temperature transistor based on a single carbon nanotube”, Nature, Vol. 393, no. 7, pp. 49- 52, 1998.
Hazeghi, A., Krishnamohan, T., & Wong, H., “Schottky-barrier carbon nanotube field-effect transistor modeling”, IEEE Trans Electron Dev, Vol. 54, no. 3, pp. 439-445, 2007.
Guo, J., Lundstrom, M., & Datta, S. ,“Performance projections for ballistic carbon nanotube fieldeffect transistors”, Appl Phys Lett; Vol. 80, no. 17, pp. 3192-3194, 2002.
Kienle, D., & Léonard, F.,“Terahertz response of carbon nanotube transistors”, Phys Rev Lett, Vol. 103, no. 2, pp. 026601, 2009.
Tans, S. J., Verschueren, A. R. M., & Dekker, C., “Room-temperature transistor based on a single carbon nanotube”, Nature, Vol. 393, no. 7, pp. 49- 52, 1998.
Hazeghi, A., Krishnamohan, T., & Wong, H., “Schottky-barrier carbon nanotube field-effect transistor modeling”, IEEE Trans Electron Dev, Vol. 54, no. 3, pp. 439-445, 2007.
Guo, J., Lundstrom, M., & Datta, S. ,“Performance projections for ballistic carbon nanotube fieldeffect transistors”, Appl Phys Lett; Vol. 80, no. 17, pp. 3192-3194, 2002.
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