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- 자료유형
- 학술저널
- 저자정보
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- 한국전기전자재료학회 Transactions on Electrical and Electronic Materials Transactions on Electrical and Electronic Materials 제20권 제2호
- 발행연도
- 2019.1
- 수록면
- 132 - 140 (9page)
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In this exposition, we have proposed the Dual Material Gate Double Gate Impact Ionization Metal Oxide Semiconductor (DMG DG IMOS) device with a gate engineered technique of Gate Stacking which is ordinarily used in MOSFET for performance augmentation. This paper compares the performance of four DG IMOS based devices i.e. Single Material Gate Double Gate IMOS (SMG DG IMOS), SMG Gate Stacked DG IMOS (SMG GS DG IMOS), DMG DG IMOS and DMGGate stacked DG IMOS (DMG GS DG IMOS). The performance of all the devices has been investigated using 2-D simulations. The device structures of gate stacked devices have been developed with two gate oxides namely SiO 2 and HfO 2 and remaining parameters have been taken alike for all four devices. The doping concentration of source and drain regions for all four devices has been taken as 10 20 cm −3 and the doping concentration of the intrinsic region has been taken as 10 15 cm −3 . The Gate Stacked devices showed better analog outcomes as compared to the other devices. The analog parameters evaluated include transconductance (g m ), total gate capacitance (C gg ) and unity gain frequency (f T ). The proposed design, DMG GS DG IMOS has been then analyzed for diff erent channel lengths and dielectrics of gate oxide materials to optimize the gate engineered design for various applications.
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