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논문 기본 정보

자료유형
학술저널
저자정보
Nho-Van Nguyen (Ho Chi Minh City University of Technology) Tam-Khanh Tu Nguyen (Ho Chi Minh City University of Technology) Hong-Hee Lee (University of Ulsan)
저널정보
전력전자학회 JOURNAL OF POWER ELECTRONICS JOURNAL OF POWER ELECTRONICS Vol.15 No.2
발행연도
2015.3
수록면
504 - 517 (14page)

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초록· 키워드

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This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.

목차

Abstract
Ⅰ. INTRODUCTION
Ⅱ. SWITCHING VOLTAGE FORMULATION FOR MULTILEVEL INVERTERS UNDER INPUT VOLTAGE IMBALANCE
Ⅲ. SWITCHING VOLTAGE IMPLEMENTATION
Ⅳ. SIMULATION AND EXPERIMENTAL RESULTS
Ⅴ. CONCLUSIONS
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